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Antmicro Blog
Read the latest articles and updates from Antmicro's blog, covering topics in open source software, hardware design, AI, and more.
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- 402 from 8 May 2018 to 27 Oct 2026
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2026 61
- Open hardware PCIe Switch Expansion Board for the Antmicro Baseboard for NVIDIA Jetson Orin
- Managing a satellite fleet from Earth with Antmicro's RDFM OTA update system and Renode
- Multi-camera machine vision systems with CSI-enabled Antmicro Baseboard for NVIDIA Jetson AGX Thor
- "Antmicro at NVIDIA GTC Berlin 2026: open hardware and open source tools for building complete NVIDIA Jetson products"
- "Improvements to SystemC co-simulation in Renode: enabling direct memory and debug transport interfaces, generic payload extension, and CPU signal support"
- A PC-like plug-and-play experience on an STM32 board with Zephyr, USB, HDMI and grvl
- Introducing a new flow for gathering Zephyr coverage data with Renode and Coverview
- Comprehensive server debugging with Antmicro's open source eSPI Debugger, DC-SCI Debug Interposer and eSPI decoder plugin
- Open source Modular DC-SCM Carrier Board compatible with Altera Agilex 5E FPGAs for datacenter scaling and customization
- "Renode 1.17.0 release: more platforms, new GUI, performance improvements, and more"
- Implementing improved GPU acceleration of global placement in OpenROAD with Kokkos
- "Zephelin 1.0.0 release: live tracing, multi-SoC scenarios and visual improvements to multi-threaded applications for tracking performance of Zephyr systems in Zephelin and Trace Viewer"
- How Analog Devices Is Leveraging Renode to Accelerate Software Development for Embedded Intelligence
- Build Next-gen Security Solutions with Nuvoton's NPCR1 OpenTitan-based Secure MCU IC Platform and Antmicro's Open Source Renode Simulation Framework
- Implementing peak, glitch, and scoped power estimation workflows in digital designs with OpenROAD
- Build entry-level edge AI products with the new NVIDIA Jetson Orin Nano 2 and Antmicro's full-stack engineering services
- Faultergeist - testing aerospace and critical applications for SEU vulnerability in Verilator
- Simulating the Toyota RAMN setup in Renode and the CARLA driving simulator
- "Recent improvements to the Renode Zephyr and U-Boot Dashboards: almost 1000 supported platforms and updated UI"
- Antmicro announces support for the new NVIDIA Jetson Thor T2000 and T3000 SoMs with full-stack engineering services and open source tooling
- Open hardware Thunderbolt to 10GbE Adapter for high-speed connectivity
- "Pipeline Manager: enhanced graph visualizations, new BUS interface, and performance optimizations"
- Antmicro joins the OpenROAD Initiative as Principal Member to expedite open source silicon design with range of open tooling and engineering services
- Discovering features of Renode with the STM32H753 Renode Reference Platform
- Generating low-level graphics on Linux devices with YAV, FbTerm, and grvl
- Open hardware STM32H7 HDMI board optimized for rendering graphics on Zephyr RTOS devices
- "Topwrap 0.7.0: improved YAML syntax with initial clock and reset support, extended SystemVerilog parsing, and more"
- Simulation-driven development of SoCs accelerated with Google's Coral NPU using Renode and Verilator
- Implementing extended technology mapping in OpenROAD with mockturtle integration
- Renode support for NXP i.MX 8M Plus
- Open source-driven Gemma 4 integration and deployment with the Antmicro Baseboard for NVIDIA Jetson AGX Thor and Kenning
- Implementing I3C Host Controller support in the open source I3C Core
- Development of USB support in Zephyr RTOS with the implementation of HID Boot device support
- Open hardware Antmicro Baseboard for Jetson Orin available for purchase on System Designer
- Antmicro supports NVIDIA-Yocto Project on Jetson launch with open source hardware and tools for OTA, fleet management, factory testing, AI
- Extending Armv8.1-M support in Renode with Helium instructions for Analog Devices' Cortex-M offering
- Anomaly detection in embedded devices using the Zephyr Sensor Anomalies library
- IEEE-compliant force/release statement support in Verilator
- Implementing a genetic algorithm in OpenROAD for improved resynthesis
- Improved simulation-based testing of Google's ChromiumOS FPMCU with Renode support for the RISC-V Andes D25F core and the related Egis ET171 SoC
- Initial implementation of four-state logic in the open source Verilator RTL simulator
- "Improvements to Antmicro's DC-SCM 2.1 reference platform: LTPI support, DC-SCM breakout board rev. 2.0, and Fru2Graph"
- Simulating active cooling using a Computational Fluid Dynamics-based flow
- Antmicro's open hardware SDI-Fiber Adapter for long-distance video transmission in high-EMI environments
- Dual-core Lockstep in the VeeR EL2 RISC-V core for safety-critical applications and side-channel access mitigation in Caliptra RoT
- Connecting Renode to the Internet on macOS through vmnet and socket-based networking
- Simplifying mechanical BOM generation and management with STEPhen
- CHIPS Alliance launches the SV Tools Project for open source development of SystemVerilog/UVM codebases
- Porting Zephyr RTOS to Synaptics SR100 AI MCUs
- Antmicro supports Aethero next-gen space computers NxN and NxA with full-stack development around NVIDIA Jetson Orin and Jetson Thor edge AI platforms
- Optimizing sv-bugpoint with speculative minimization algorithms
- An experimental GUI for alternative interaction with the Renode simulation framework
- Renode support for the high-performance, low power NXP i.MX RT700 MCU
- Introducing Antmicro's open hardware OCuLink-to-10 GbE Adapter for demanding edge AI scenarios
- Automated DAC signal integrity verification with eyescan tests and Protoplaster
- Improved Zephyr Virtual Filesystem for porting applications to Zephyr
- Timing path information in hierarchical static timing analysis of ASICs using OpenROAD
- "Topwrap: better SystemVerilog support for complex designs, auto-validation, and support for AXI interconnects"
- Ruggedized Jetson AGX Thor Baseboard setup for robotics and industrial applications
- Multi-objective optimization in AutoTuner for efficient ASIC design selection in OpenROAD
- Automated bus performance analysis with Busperf
2025 54
- Exporting data from the girdl Ghidra plugin into a debugger
- Graphics Rendering Visual Library (grvl) - a lightweight GUI library for Zephyr-based MCUs
- Benchmarking and optimizing AI models on Jetson AGX Thor with Kenning
- Improved atomic operations for simulating complex multi-core systems in Renode
- Designing modular and reusable RISC-V SoCs with Topwrap and Guineveer
- Using RDFM's telemetry module to gather data from fleets of remote devices
- Initial support for reverse execution in Renode via GDB
- Verifying memory vulnerabilities to radiation using Antmicro's open source DRAM testing framework
- Renode tests for SMMU translation with Armv8-A and Armv8-R
- Optimizing the resynthesis process in OpenROAD with simulated annealing
- Using Fastboot USB in Pigweed with modules specific to i.MX RT595
- Renode Bazel rules for advanced co-simulation scenarios using Verilator as an example
- Simulating bottlenecked heat transfer with Antmicro's automated thermal simulation flow
- Real-time profiling and tracing in Zephyr RTOS with Zephelin AI Profiling Library
- Support for upstream UVM 2017 in Verilator
- "New Protoplaster features: server API, WebUI, test suites, and others"
- Enhancing Virtio support in Zephyr with a new API and additional components
- Modular, open source DC-SCM 2.1 reference design with Lattice FPGA and NXP SoC
- Introducing Antmicro's open hardware NVIDIA Jetson AGX Thor Baseboard
- Open source-driven video latency assessment for machine vision systems
- "girdl: a Ghidra plugin for automatic analysis of register description files"
- Accelerating Renode simulation on Linux-based x86-64 machines with KVM support
- Using Zephyr RTOS as a unikernel for improved application performance
- Simulating low-power mesh IoT systems in Renode with Silicon Labs Wireless Gecko Series 2
- Enhancing RTL coverage reporting in Verilator with new features and computation optimizations
- "New features in Pipeline Manager: subgraphs, extended UI, full frontend support, and improved API"
- End-to-end testing flow for Jetson Orin Baseboard with In-Circuit Tester and Protoplaster
- Implementing the xdelta algorithm in RDFM for more efficient delta updates generation
- Introducing OCuLink support for the Open Source Jetson Orin Baseboard
- Running Linux and Zephyr on the Renesas RZ/G2L MPU in Renode
- Implementing automatic clock gating in the OpenROAD ASIC design toolchain
- "Recent improvements to Antmicro's signal integrity simulation flow: adaptive grid generation, differential pair simulation and more"
- "Simplifying Edge Intelligence: Open-Source AutoML for Embedded Devices Now Generally Available"
- Power estimation in OpenROAD using SAIF in Verilator
- Extending AutoML features in Kenning and Zephyr for platforms with custom AI accelerators
- Renode integration with Coverview for improved code coverage analysis
- Automating digital design and verification tracking with testplanner
- Scalable and expandable audio latency testing platform for AR/XR development
- Improving Verilator's hierarchical mode for better performance and scalability
- Extending the Pigweed SDK with Bluetooth support for the NXP MIMXRT595
- Renode integration with MPACT-Cheriot for secure IoT systems simulation
- Improving Renode performance on Mac with native 64-bit Arm host support
- Enabling complex HDL co-simulation scenarios using Renode's Direct Programming Interface support
- Complete GMSL-based solutions for automotive and robotic applications
- Automated and standardized software benchmarking with Benchalot
- Building an open source ZSTD decoder in the XLS Mid-Level Synthesis toolchain
- Generating interactive coverage dashboards with Coverview
- Generating AutoML-based models for embedded in Kenning
- Open source thermal simulation and analysis with 3D visualizations
- Renode support for the NXP S32K Automotive General-Purpose MCU
- Boosting edge AI performance with the latest revision of the Jetson Orin Baseboard and NVIDIA's Jetson Orin Nano/NX Super
- "New features in Remote Device Fleet Manager: Web GUI, single-file updates and cloud setup guide"
- Simplifying Renode model generation with SystemRDL-to-C# conversion
- Simulating ultra-low-power MSP430 MCUs in Renode
2024 57
- Testing and debugging embedded systems in simulation with Renode VS Code extension
- New revision of the open source Data Center RDIMM DDR5 Tester
- Fast development of AI applications in Zephyr with Linkable Loadable Extensions support in Kenning
- 10 hrs to 37 mins - Optimizing LLVM for machine-generated C++ code
- Open source COM Express Baseboard for Type 7 Basic modules
- Demonstrating CAN support in Renode with SocketCAN and Wireshark
- LLM optimizations for sparse matrix processing on Jetson Orin and other Ampere GPUs
- Introducing Antmicro’s open source Myra System-in-Package
- Support for VeeR EL2 with User Mode and Physical Memory Protection in Tock embedded OS
- Open hardware baseboard for PolarFire SoM and other CM4 form-factor devices
- Renode GitHub Action for automated testing on simulated hardware
- Trace-based evaluation of CPU cache usage in Renode
- Introducing fast RISC-V interrupts support in Renode for real time applications
- "sv-bugpoint: pinpoint minimal bug-inducing SystemVerilog code subsets to improve debugging in Verilator and other SV tools"
- Enabling open source UVM verification of AXI-based systems in Verilator
- Extending the VeeR EL2 RISC-V CPU core with User mode for Caliptra 2.0
- Testing complex, heterogeneous AMP systems with Renode using Zynq UltraScale+
- Running hypervisors on Armv8-R CPUs with virtualization support in Renode
- Antmicro’s open source Jetson Orin Baseboard available for purchase from CircuitHub
- Topwrap – open source toolkit for modular, parameterizable digital logic design
- "Bazel-orfs: Combining Bazel with OpenROAD Flow Scripts for rapid ASIC design iteration with caching"
- "Constrained randomization in Verilator: SystemVerilog constraint to SMT-LIB2 conversion"
- Automated PCB trace selection in signal integrity simulation for high-speed digital interfaces
- Strategic partnership between Framos and Antmicro enables rapid development of open source-based embedded vision systems
- Over-The-Air streaming updates using RDFM for NVIDIA BSP releases
- "Press Release: Aethero and Antmicro form a strategic partnership for the creation of high-performance space-rated modular edge computers using open source"
- OTA updates and fleet management for Zephyr-controlled MCUs with RDFM
- Rapid development of multi-node space systems with open source. Antmicro sponsors SMC-IT/SCC 2024
- SystemC co-simulation in Renode
- Open source System on Module with Microchip PolarFire SoC
- Defining RISC-V CPUs in Renode simulation with custom instructions and extensions
- Initial assertion control support in Verilator
- Interactive Component Highlighting on the Open Hardware Portal
- Improved Linux filesystem sharing for simulated devices with extended Virtio support in Renode
- Efficient OTA updates with delta packages in Remote Device Fleet Manager
- Evaluating and deploying ROS 2 nodes for real-time AI computer vision with Kenning
- Recent developments in the Zephyr port for RISC-V
- "Warp Pipe: library for simulation-driven development of Zephyr and Linux-based PCIe devices"
- Storage Expansion Board for Jetson Orin Baseboard
- Improving data sources and tests in the Renode Zephyr Dashboard and Renodepedia
- Electromagnetic interference analysis with automated near-field scanning for size-constrained devices
- Speeding up OpenROAD for fast turnaround design feedback
- Introducing jswasi - a Wasm/WASI runtime for browsers
- Virtually recreating the Tesla Roadster with open source tools
- Customizable and scalable GPU cluster for complex, CI-driven computational tasks
- Introducing constrained randomization in Verilator
- Scalable edge AI benchmarking and optimization with Zephyr runtime for Kenning
- Remote reporting and logging in Protoplaster for easier product debugging
- Introducing code coverage reporting in Renode
- Add a GUI to your CLI apps with editable graphs, multiple terminals and asynchronous servers using Pipeline Manager
- Extending the ChromiumOS fingerprint module test suite with initial Nuvoton NPCX9 support in Renode
- Versatile SO-DIMM (LP)DDR5 Rowhammer testing platform
- Developing and testing heterogeneous space systems with Renode
- Improved and automated image data analysis with Raviewer's new features
- Robust camera systems with Antmicro’s open source GMSL video streaming hardware
- Analyze Verilator processes and ASTs with the astsee suite
- Adding Physical Memory Protection to the VeeR EL2 RISC-V Core
2023 58
- New features launched for the markup based MyST Editor
- Expanding RISC-V support in Renode with Bit-Manipulation extensions
- Developing and testing with Renode in heterogeneous, multi-node automotive use cases
- Expanding Renode platform coverage with the U-Boot dashboard
- Simplifying accelerator integration for FPGA-based edge AI solutions with Accelerator Interface Generator
- Initial support for ARMv7-R CPUs in Renode with Cortex-R5 and Cortex-R8
- High-frequency hardware design with open source signal integrity analysis
- RDFM - open source framework for modular, configurable, multi-OS device OTA updates and fleet management
- Python-driven automation and scripting in Renode with pyrenode3
- Enabling secure open source ML products with Open Se Cura
- Initial open source support for UVM testbenches in Verilator
- "Expanding Renode Zephyr Dashboard: more platforms, new demos and improvements in Renodepedia"
- Simplifying hardware development with Antmicro's open source Hardware Component Database
- Optimize and deploy edge AI solutions using Kenning efficiently with custom URI schemes, new commands, HTML reports and more
- Zephyr support for Ambiq Apollo4 Plus
- Linux support on 64-bit Cortex-A platforms in Renode for automotive, space and industrial scenarios
- Fully open source FPGA design for SDI-MIPI Video Converter
- "Pipeline Manager: Improved data validation, subgraphs, QoL changes, and more"
- Fuzzing Zephyr with AFL and Renode
- Renode 1.14 with ARMv8 support, improved co-simulation and new platforms
- DPI support in Renode for HDL co-simulation with Verilator and Questa
- Accelerating digital block design with Google’s open source Mid-Level Synthesis XLS toolchain
- Build embedded systems interactively with Antmicro's Visual System Designer
- Verilator model generation performance improvements and initial multithreaded verilation support
- BLE host-guest communication via HCI in Renode
- Running the LineageOS Android distribution on NVIDIA Jetson-based devices
- Vidar - a lightweight, open source video platform
- Dedicated ROS 2 nodes for AI-enabled computer vision tasks
- High-speed Thunderbolt and 10GbE connectivity for Jetson-based VR, smart camera and industrial devices
- RISC-V co-design using trace-based simulation with Renode and TBM
- Cortex-R support in Renode for safety-critical applications
- Open source Data Center RDIMM DDR5 Tester for memory vulnerability research
- Initial support for STM32WBA in Renode
- Using Zephyr RTOS as a bootloader for Linux on RISC-V platforms
- ChromiumOS EC testing suite in Renode for consumer-grade products
- Open source and CI-driven RTL testing and verification for Caliptra’s RISC-V VeeR core
- Building advanced testing suites for Zephyr devices with Twister, Renode and Robot Framework
- Adding Zephyr support for Silicon Labs BG22 and MG24
- Open hardware Jetson Orin Baseboard 1.1 supporting Orin Nano SoM
- Co-developing RISC-V AI solutions using Vector Extensions in Renode with Kenning bare-metal runtime and IREE
- Using Kenning in edge AI processing for industrial sorting machines
- ARMv8-A and 64-bit peripheral support in Renode
- Antmicro’s Open Hardware Portal - opening the hardware design process with KiCad and Blender
- Simulating NB-IoT networking in Renode
- Open hardware Xilinx Kintex K410T development board for ASIC prototyping with RISC-V and OpenTitan
- Pre-silicon secure ASIC development based on OpenTitan in Renode
- Adapting OpenTitan for open source FPGA prototyping and tooling development
- Design, visualize and run AI flows with Pipeline Manager for Kenning
- Testing Zephyr software using new CMock/Unity module and Renode
- Automatic pipeline optimization and advanced edge AI applications in Kenning
- Integrating the Language Server Protocol in Verible
- Open source FPGA designs for the SDI to MIPI CSI-2 Bridge
- Building video systems with NVIDIA Jetson using FRAMOS cameras
- Open source FPGA NVMe accelerator platform for BPF driven ML processing with Linux and Zephyr
- GitHub action for v4l2 application testing in Renode
- CPU RTL co-simulation in Renode
- grabthecam and farshow - libraries for rapid video acquisition pipeline development
- Progress in open source SystemVerilog / UVM support in Verilator
2022 52
- Support for Microchip’s RISC-V platforms in Antmicro’s open source Renode framework and beyond
- Introducing Antmicro's open hardware Jetson Orin Baseboard
- Expanding the scalability and flexibility of CI with custom GitHub runners
- Providing synchronized multi-sensor data in Renode with RESD
- Next-gen SDI-MIPI Video Converter with Lattice CrossLink-NX
- Benchmarking Deep Neural Networks on NVIDIA Jetson AGX Orin with Kenning
- Protoplaster - an automated hardware and BSP testing framework
- Comparing optimized models using recent developments in Kenning
- Adapting an open source CAN core for a custom ASIC
- Pre-silicon testing of SkyWater MPW designs using co-simulation with Renode and Verilator
- Scaling Verilator for very large designs
- Bluetooth Mesh networking pathfinding algorithm development using Renode
- Simplifying v4l2 workflows with Raviewer and pyrav4l2
- Renode now supports .NET 6
- Open source TileLink to AHB bridges with dedicated Cocotb extensions
- MyST Markdown editor component for easier collaboration
- Introducing Kenning, TVM and micro-ROS to the meta-antmicro Yocto layer
- Building next-gen AI products with NVIDIA Jetson AGX Orin
- Demystifying software – different methods of execution tracing with Renode
- Open source AMD Xilinx Kria UltraScale+ SoM baseboard
- F4PGA open source flow gets a new Python-based build system and CLI tool
- Deployment pipelines and enhanced modularity in Kenning
- Renode gains support for Maxim Integrated’s MAX32650
- Renodepedia - From Zephyr’s structured data to traceable and testable open hardware with Renode
- Running Rust programs in seL4 using the sel4-sys crate
- Initial Renode support for Ambiq Apollo4 Blue
- "Scalerunner: open source compute cluster"
- Extending the open source Rowhammer testing framework to DDR5
- Implementing Over-The-Air (OTA) updates for embedded Linux and Android systems
- Fully deterministic Linux + Zephyr/micro-ROS testing in Renode
- Simulating SoCs with isolated address spaces in Renode
- Open source hardware accelerator subsystem for FPGA/ASICs
- seL4 userspace debugging with GDB extensions in Renode
- Co-developing Machine Learning with a RISC-V vector core using Renode for Google Research
- Speeding up SoC interconnects with test-driven FPGA development using Cocotb
- Renode 1.13 for improved machine learning and pre-silicon development
- "Antmicro at Zephyr Developer Summit 2022: Renode, RISC-V and more"
- Open source Qualcomm Snapdragon 625 Baseboard
- Reproducible cross-platform edge AI systems with Yocto
- Developing and testing BLE products on nRF52840 in Renode and Zephyr
- Open source Qualcomm Snapdragon 845 Baseboard
- "Precursor: Renode for developing advanced products with embedded GUIs"
- Test-driven development of multi-node Zephyr + micro-ROS solutions with Renode
- Deploying hybrid AI solutions on edge device fleets
- Making open source SystemVerilog synthesis easier with the UHDM plugin for Yosys
- "Press Release: CHIPS Alliance Forms F4PGA Workgroup to Accelerate Adoption of Open Source FPGA Tooling"
- Machine vision with flickerless LED lighting
- Building low-latency smart video solutions with open source tools and Lattice CrossLink-NX
- "Enhancing supply chain security for embedded systems: Renode Dashboard for Zephyr RTOS adds new SBOM capabilities by default"
- Adding Xtensa ISA support in Renode for the Sound Open Firmware project
- Open source keystroke injector implementation on the Fomu FPGA board
- "Zynq mkbootimage: an open source boot image generator for Xilinx Zynq 7000 and UltraScale+"
2021 50
- "Towards UVM: Using coroutines for low-overhead dynamic scheduling in Verilator"
- Open source FPGA platform for Rowhammer security testing in the data center
- Software-driven ASIC prototyping using the open source SkyWater Shuttle
- SATA design implementation on FPGAs with open source tools
- RISC-V vector instructions support in Renode
- Raviewer - an open source tool for debugging video pipelines
- Sharing files between host and simulated platform in Renode with Virtio and other means
- Introducing Modular Runtime Flows to Kenning
- "Renode’s Zephyr dashboard: simulating 100 Zephyr platforms"
- Improving the OpenLane ASIC build flow with open source SystemVerilog support
- Open Source Debayerization blocks in FPGA
- "Boosting Machine Learning with tailored accelerators: Custom Function Units in Renode"
- "Advanced co-simulation with Renode and Verilator: Zynq and FastVDMA"
- "Press Release: Antmicro Doubles Down on Commitment to Zephyr RTOS as Community Grows to More Than 1,000 Contributors"
- LEON3 support in Renode
- FPGA Interchange format to enable interoperable FPGA tooling
- Automatic SystemVerilog linting in GitHub Actions with Verible
- Open source DDR controller framework for mitigating Rowhammer
- Open source custom GitHub Actions runners with Google Cloud and Terraform
- "Open M.2 Smart IoT Module: opening up building automation"
- Open source SystemVerilog tools in ASIC design
- Rust peripheral support in Renode
- Zephyr FPGA controller
- Initial Bluetooth support for nRF52840 in Renode
- High-end, cost-optimized Android devices using Qualcomm Snapdragon
- DC-SCM compatible open source BMC hardware platform
- "Advanced co-simulation with Renode and Verilator: PolarFire SoC and FastVDMA"
- Deploying deep learning models on the edge with Kenning
- Antmicro Open Source Portal launched
- NVIDIA releases TX2 NX SoM compatible with Antmicro's Open Source Jetson Baseboard
- Dynamic scheduling in Verilator - milestone towards open source UVM
- Run Linux on BeagleV Starlight in Renode
- Antmicro’s ARVSOM RISC-V module announced
- Antmicro’s open hardware SDI-MIPI bridge available off the shelf with host software
- Renode 1.12 release - new platforms, sensors and debugging features
- Scalenode - server-oriented baseboard for Raspberry Pi 4 compute module
- ROS-based tester for tracking and detection algorithms
- Modular, open-source FPGA-based LPDDR4 test platform
- Adopting embedded systems for industrial vision applications and smart factories
- Renode-based CI for TensorFlow Lite MCU
- Detection and tracking dataset generator
- GitHub Actions self-hosted runners, Build Event Server and Google Cloud
- 3D vision pipeline for industrial sorting automation
- Using Renode for education, research and demonstration
- "Press Release: CHIPS Alliance Welcomes Antmicro to the Platinum Membership Level"
- High-throughput open source PCIe on Xilinx VU19P-based ASIC prototyping platform
- Viewing and sharing CI build results with the distant-bes client
- The UltraScale+ Processing Module is released as open source hardware
- Very Efficient Deep Learning in IoT project with RISC-V and Renode
- Apalis Smart Vision Baseboard released as open source
2020 41
- Enabling open source Ibex synthesis and simulation in Verilator/Yosys via UHDM/Surelog
- Open source FPGA tools and Renode support for Core-V MCU
- Betrusted’s Precursor and Renode - a user story
- RISC-V Summit 2020 - virtual booth, keynote session and talks
- Renode 1.11 - improved testing, RISC-V support and user experience
- SkyTrack - smart detection and tracking system
- RPC DRAM support in open source DRAM controller
- Multi-band wireless communication in Renode with Zolertia Firefly
- FPGA tool performance profiling framework for FPGA design comparison
- Open Jetson Nano / Xavier NX baseboard available for purchase
- zGlue teams up with Antmicro and Google in Open Chiplet Initiative
- Automatic CPU testing with Embench
- Speech recognition with I2S in Zephyr and TensorFlow Lite
- Running Linux GUIs on Zynq with FastVDMA and Snickerdoodle HDMI breakout board
- Building RISC-V systems on the secure seL4 microkernel in Renode
- Plug-and-play AI acceleration with Thunderbolt
- Antmicro’s open source SDI-to-MIPI Bridge
- Renode 1.10 - new architectures, platforms, peripherals and more
- Running Android on Antmicro’s open source NVIDIA Jetson Nano and Xavier NX baseboard
- PolarFire SoC Icicle Kit with Antmicro’s HDMI board
- Antmicro joins the OpenPOWER Foundation - Q&A
- CHIPS SweRV cores and the open tools ecosystem
- 10Gb Ethernet connectivity between Antmicro’s NVIDIA Jetson Nano / Xavier NX Baseboards
- Open Source Process Design Kit from Google, SkyWater technologies and partners released
- "Press Release: QuickLogic Announces Open Reconfigurable Computing Initiative"
- Running and testing TensorFlow Lite on microcontrollers without hardware in Renode
- Renode 1.9 release with new platforms, RISC-V improvements, dual radio & more
- Antmicro’s NVIDIA Jetson TX2 Deep Learning Platform released as open source hardware
- Running Linux with Quad-core SMP in LiteX/VexRiscv on Arty A7
- Microwatt and the POWER ISA support in Renode
- Updated NVIDIA Jetson Nano / Xavier NX open source baseboard with M.2 PCIe connector
- SystemVerilog linting and formatting with FuseSoC - Verible integration
- Open source hardware dual camera module for stereovision applications
- Open hardware FPGA platform for multi-camera systems
- QuickLogic and Antmicro Partner to Bring Low Power Machine Learning to Endpoint IoT Devices
- "Open computing at the edge: Embedded World 2020"
- A high-speed stereovision camera system for industrial use cases
- Support for the CivetWeb HTTP server in Zephyr
- Comparison and usage of multiple algorithms for Single Object Tracking in ROS
- "Blueprint: SDI/HDMI to HDMI/MIPI smart converter and streamer"
- Speeding up builds with Remote Execution API
2019 25
- Allied Vision Alvium drivers released for Jetson TX2 (and Nano)
- "Press release: Antmicro and zGlue release rapid turnaround chiplet-based GEM ASIC"
- Tensorflow Lite in Zephyr on LiteX/VexRiscv
- Testing open source USB IP cores with Python and Cocotb
- An open source SystemVerilog Test Suite
- NVIDIA announces Jetson Xavier NX compatible with Antmicro's Open Source Jetson baseboard
- Including physical components in Renode simulation using EtherBone bridge
- Portable containers with Singularity
- Antmicro's work with Time Sensitive Networking support in the Zephyr RTOS
- Renode 1.8 release with multi-core GDB support and new RISC-V platforms
- Antmicro's open Jetson Nano Baseboard with NVIDIA's latest production SoMs and ALVIUM cameras
- "Antmicro's Fast Versatile DMA: an open, portable & vendor-neutral DMA controller"
- Co-simulating HDL models in Renode with Verilator
- Zephyr RTOS and Cortex-R5 on Zynq UltraScale+
- Multi-core debugging with GDB in Renode
- Scaling edge AI devices with automated cloud build environments
- Open source Verilog simulation with Cocotb and Verilator
- Open source Zephyr RTOS featured in RISC-V Getting Started Guide
- Renode 1.7 with new soft platforms and TSN/PTP support released
- "Press release: Antmicro & Data Modul present Artificial Intelligence for Industrial Edge-Computing HMI"
- Antmicro releases open source Android BSP for Antmicro Smart Vision Kit with Toradex Apalis TK1
- Decreasing the Length of Design Cycle in Co-Designed SoCs with Renode
- Open hardware Coral edge AI baseboard
- Antmicro's Open Hardware Baseboard Aims to Broaden Outreach of New NVIDIA Jetson Nano Edge AI Platform
- Antmicro advocates open digital design at Embedded World 2019
2018 4
- Renode 1.6 released making Linux-enabled RISC-V Microchip PolarFire SoC available to everyone
- "Vision 2018: Machine vision switches to edge platforms"
- Antmicro’s Smart Vision devkit with Toradex Apalis iMX8 gets Movidius / UP AI support
- "Press release: Antmicro reveals partnership with Thales on the disruptive RISC-V open ISA"