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Computer, Enhance!
Programming Courses and Interviews, by Casey Muratori. Click to read "Computer, Enhance!", by Casey Muratori, a Substack publication with tens of thousands of subscribers.
- Posts
- 276 from 5 Jul 2022 to 27 Oct 2026
- Posting
- weekly (47 in the last year)
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- personal blog
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2026 43
- What’s in a Token?
- Horizontal Operations
- SIMD Unpacks
- SIMD Shuffles
- Q&A #88 (2026-10-02)
- Nested SIMD Predicates
- SIMD Mask Registers
- What Is AI Doing to Math?
- High-Performance Database Architecture
- 520 Pages Per Hour
- Is AI a Good Research Assistant?
- SIMD Masking
- The Root of the Root of All Evil
- Q&A #87 (2026-08-25)
- The Pit of Success
- The Pattern Behind x64 CMPPS/PD Immediates
- SIMD Predicates
- Branchless Absolute Value
- What New Jobs?
- Three Steps from Scalar to SIMD
- Why AI Companies Need Scale
- Let's Decode the Mystery Bytes!
- Will AI End the Open Internet?
- Q&A #86 (2026-06-10)
- Intuitive Random Selection (with Marc LeBlanc)
- Will AI Make Me Worse?
- The First Entity Component System
- How to Use uops.info
- Q&A #85 (2026-05-26)
- Let's Answer Ray's Question!
- Block Interleaving
- The Ethics of Generative AI
- Q&A #84 (2026-04-20)
- "Am I Crazy?"
- In-order Interleaving
- My Thoughts on Notch's DLSS Post
- Making Sense of the Hype
- Q&A #83 (2026-03-11)
- Should You Be A Carpenter?
- Dependency Chain Stalls
- The Sitdown: Types of DRAM and the DRAM Shortage
- Q&A #82 (2026-01-27)
- DynamoDB, Don't Leave Me Hanging!
2025 42
- Dead Code Elimination Prevention Macros
- Q&A #81 (2025-12-22)
- Our Nemesis Returns
- Q&A #80 (2025-10-31)
- Better Prevention of Dead Code Elimination - Or Is It?
- Q&A #79 (2025-09-28)
- Catch the Tower Stream Live Today
- New Collaboration with Marco Behler
- A Brief Status Update
- Reading CPU Diagrams
- The Montana Mini-Computer (feat. Carson Gross)
- My Cyber Rush Week Conversation with Josiah Stearns
- Q&A #78 (2025-07-21)
- The Big OOPs: Anatomy of a Thirty-Five Year Mistake
- Catch the Live Broadcast of My BSC Talk!
- Selectively Preventing Optimizations
- Q&A #77 (2025-06-19)
- Simplified Haversine Candidates
- Computer Enhance Summer News!
- Q&A #76 (2025-05-23)
- The Micro Group
- Removing Waste
- Our Very Own Haversine
- Q&A #75 (2025-05-02)
- Extending Arcsine to the Full Input Range
- Approximating Arcsine
- Q&A #74 (2025-04-01)
- An Interview with Zen Chief Architect Mike Clark
- Coefficient Arrays for Polynomial Evaluation
- Q&A #73 (2025-03-03)
- Fused Multiply-Add
- Q&A #72 (2025-02-17)
- Horner's Rule
- Approximation Using Higher-Power Polynomials
- Q&A #71 (2025-02-03)
- Math Tester Retcon
- Range Reduction
- Function Approximation
- Q&A #70 (2025-01-20)
- Introduction to SSE Intrinsics
- Q&A #69 (2025-01-13)
- Q&A #68 (2025-01-06)
2024 79
- Determining Input Ranges
- Identifying Non-inlined Math Functions
- Reference Haversine Code
- Q&A #67 (2024-11-18)
- Meow Hash
- Real-time PMCs on Windows with ETW
- Halloween Spooktacular Day 15: Use GetEventProcessorIndex to Help Track Profile Regions
- Halloween Spooktacular Day 14: Use SysCallEnter to Mark Stop Points
- Halloween Spooktacular Day 13: Use SysCallExit to Mark Start Points
- Halloween Spooktacular Day 12: Find Another PMC Event Type
- Halloween Spooktacular Day 11: Define Your Own Event UserData
- Halloween Spooktacular Day 10: Use TraceEvent
- Halloween Spooktacular Day 9: What's Left?
- Halloween Spooktacular Day 8: Mārtiņš Možeiko's Miniperf
- Halloween Spooktacular Day 7: Look for PMCs in the ExtendedData
- Halloween Spooktacular Day 6: PMCs Only Work for A Subset of Event Types
- Halloween Spooktacular Day 5: Call TraceSetInformation Twice
- Halloween Spooktacular Day 4: Use TraceQueryInformation
- Halloween Spooktacular Day 3: Trace in Real-Time Mode
- Halloween Spooktacular Day 2: Reboot Your Machine
- Halloween Spooktacular Day 1: The Challenge
- Announcing the 2024 Halloween Spooktacular Challenge!
- Q&A #66 (2024-10-01)
- The Case of the Missing Increment
- Q&A #65 (2024-09-09)
- Zen, CUDA, and Tensor Cores, Part I: The Silicon
- Q&A #64 (2024-08-26)
- Q&A #63 (2024-08-19)
- Q&A #62 (2024-08-08)
- Testing Memory-Mapped Files
- Q&A #61 (2024-07-30)
- Esoterica: Next-gen x64 Cores and Micro-op Caches
- A Brief Note on the CrowdStrike Outage and "Tech Influencer" YouTube
- Q&A #60 (2024-07-22)
- A Closer Look at the Prefetching Performance Graph
- Q&A #59 (2024-07-15)
- A.N.A.L.O.G. Computing Adventures
- Overlapping File Reads with Computation
- Q&A #58 (2024-06-24)
- 2x Faster File Reads
- Me and Prime Talk Game Engine Basics
- Q&A #57 (2024-06-17)
- Prefetching Wrap-up
- The World's First CG Commercial
- Q&A #56 (2024-06-10)
- Podcast Appearances, New Video on the Way, etc.
- Q&A #55 (2024-05-20)
- Q&A #54 (2024-05-13)
- Prefetching
- Q&A #53 (2024-05-06)
- Non-temporal Stores
- Q&A #52 (2024-04-29)
- A Brief Note on the FTC Noncompete Rule
- Q&A #51 (2024-04-18)
- Does x86 Need to Die?
- Cache Sets and Indexing
- Q&A #50 (2024-04-08)
- Q&A #49 (2024-04-02)
- The Apple M-Series GoFetch Attack
- Q&A #48 (2024-03-25)
- Unaligned Load Penalties
- Q&A #47 (2024-03-18)
- Latency and Throughput, Again
- Q&A #46 (2024-03-11)
- Non-Power-of-Two Cache Size Testing
- Q&A #45 (2024-03-04)
- Cache Size and Bandwidth Testing
- Q&A #44 (2024-02-26)
- Increasing Read Bandwidth with SIMD Instructions
- Q&A #43 (2024-02-06)
- Execution Ports and the Scheduler
- Q&A #42 (2024-01-29)
- Q&A #41 (2024-01-23)
- Reader Poll: Sponsored Job Offers
- The RAT and the Register File
- Q&A #40 (2024-01-18)
- MSVC PDBs Are Filled With Stale Debug Info
- Q&A #39 (2024-01-09)
- Byte Positions Are Better Than Line Numbers
2023 108
- Code Alignment
- Q&A #38 (2023-12-11)
- Branch Prediction
- Q&A #37 (2023-12-04)
- A Few Quick Notes
- CPU Front End Basics
- Q&A #36 (2023-11-27)
- Linking Directly to ASM for Experimentation
- Q&A #35 (2023-11-20)
- Analyzing Dependency Chains
- Q&A #34 (2023-11-13)
- Intuiting Latency and Throughput
- Q&A #33 (2023-11-06)
- Inspecting Loop Assembly
- Q&A #32 (2023-10-30)
- Memory-Mapped Files
- Q&A #31 (2023-10-23)
- Faster Reads with Large Page Allocations
- Q&A #30 (2023-10-09)
- Powerful Page Mapping Techniques
- Q&A #29 (2023-10-02)
- Analyzing Page Fault Anomalies
- Q&A #28 (2023-09-25)
- Four-Level Paging
- Q&A #27 (2023-09-18)
- Game Development Post-Unity
- Probing OS Page Fault Behavior
- Q&A #26 (2023-09-11)
- Page Faults
- Q&A #25 (2023-09-04)
- Monitoring OS Performance Counters
- Q&A #24 (2023-08-28)
- Repetition Testing
- Q&A #23 (2023-08-21)
- Measuring Data Throughput
- Q&A #22 (2023-08-15)
- Efficient DDA Circle Outlines
- Microsoft Intern Interview Question #3: Flood Fill Detection
- Microsoft Intern Interview Question #2: String Copy
- Microsoft Intern Interview Question #1: Rectangle Copy
- The Four Programming Questions from My 1994 Microsoft Internship Interview
- Monday Q&A #21 (2023-07-31)
- Comparing the Overhead of RDTSC and QueryPerformanceCounter
- A Tale of Two Radio Shacks
- New Q&A Process
- A First Look at Profiling Overhead
- Monday Q&A #20 (2023-07-17)
- Profiling Recursive Blocks
- Monday Q&A #19 (2023-07-10)
- Profiling Nested Blocks
- Monday Q&A #18 (2023-07-03)
- Instrumentation-Based Profiling
- Monday Q&A #17 (2023-06-26)
- How does QueryPerformanceCounter measure time?
- Monday Q&A #16 (2023-06-19)
- Introduction to RDTSC
- Monday Q&A #15 (2023-06-12)
- Initial Haversine Processor Code Review
- Monday Q&A #14 (2023-06-05)
- Writing a Simple Haversine Distance Processor
- Monday Q&A #13 (2023-05-29)
- Generating Haversine Input JSON
- Monday Q&A #12 (2023-05-22)
- The First Magic Door
- Part One Q&A and Homework Showcase
- 8086 Simulation Code Review
- Monday Q&A #11 (2023-05-15)
- How to Play Trinity
- 8086 Internals Poll
- From 8086 to x64
- Monday Q&A #10 (2023-05-08)
- Estimating Cycles
- Performance Excuses Debunked
- Monday Q&A #9 (2023-04-24)
- The Stack
- Other Common Instructions
- Monday Q&A #8 (2023-04-17)
- Simulating Real Programs
- Simulating Memory
- Monday Q&A #7 (2023-04-10)
- Response to a Reporter Regarding "Clean Code, Horrible Performance"
- Simulating Conditional Jumps
- Simulating ADD, SUB, and CMP
- New Schedule Experiment
- Homework Poll!
- Simulating Non-memory MOVs
- Using the Reference Decoder as a Shared Library
- Monday Q&A #6 (2023-03-20)
- 8086 Decoder Code Review
- Monday Q&A #5 (2023-03-13)
- Opcode Patterns in 8086 Arithmetic
- Monday Q&A #4 (2023-03-06)
- Decoding Multiple Instructions and Suffixes
- Instruction Decoding on the 8086
- "Clean" Code, Horrible Performance
- The Haversine Distance Problem
- Monday Q&A #3 (2023-02-20)
- Python Revisited
- Multithreading
- Monday Q&A #2 (2023-02-12)
- Caching
- Single Instruction, Multiple Data
- Monday Q&A (2023-02-05)
- Instructions Per Clock
- Waste
- Welcome to the Performance-Aware Programming Series!
- Performance-Aware Programming Series Begins February 1st
- Table of Contents