All blogs / CPU / microarchitecture
SiFive
The SiFive blog is your go-to source for updates on breakthroughs in processor IP, compute density, chip architecture, and innovations whether you're producing killer wearables and consumer devices, optimizing a datacenter, or building next-generation automobiles.
- Posts
- 146 from 29 Nov 2016 to 22 Oct 2026
- Posting
- monthly (10 in the last year)
- Kind
- company blog
2026 10
- Beyond the CPU and GPU: SiFive in Datacenter Infrastructure
- The Next Leap in Datacenter AI: Orchestrating Custom Accelerators with SiFive Intelligent Control Units (ACUs)
- SiFive Perspective: RISC-V SPMP Specification Ratification is a Leap Forward for Embedded Security
- Introducing SKL: The SiFive Kernel Library
- RISC-V EU Summit 2026: An Ecosystem Coming of Age
- Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
- P570 Gen 3: A System Perspective
- Investing In Our Next Chapter of Growth
- The RISC-V Code Models (2026 Edition): medlow, medany, & large
- Why the SiFive-NVIDIA Milestone Matters
2025 16
- X100 - Securing the System - RISC-V AI at the Edge - SiFive
- Building the Future of AI with SiFive X100 as an Accelerator Control Unit (ACU)
- Enabling AI Innovation at The Far Edge
- The Perfect Solution for Local AI - SiFive Blog
- RISC-V for Infrastructure: For Now, It’s All About the Developer
- SiFive Celebrates 10 Years as Your Trusted Partner for RISC-V IP Innovation
- Breakthrough in Automotive AI: Running BEVFormer on SiFive’s Early Access RISC-V Intelligence XM Platform
- Red Hat Brings Their Enterprise Linux On SiFive Hardware
- From Berkeley Lab to Global Standard: RISC‑V’s 15-Year Journey
- SiFive Storage Solutions: Powering the Next Generation of SSD
- How the SiFive HiFive Premier P550 is Accelerating Linux Ecosystem Adoption
- SiFive’s New Look: A Reflection of Our Growth and Vision
- Cycuity Partners with SiFive & BAE Systems to Strengthen Microelectronics Design Supply Chain Security
- How SiFive is Driving AI and Datacenter Innovation
- RISC-V Software Updates: Great Progress in 2024 and Much More Ahead in 2025
- Thoughts from CES
2024 18
- HiFive Premier P550 Development Boards with Ubuntu Now Available—With Great Reviews & Lower Price
- SiFive Accelerates RISC-V Vector Integration in XNNPACK for Optimized AI Inference
- SiFive Leadership in the Rapidly-Growing Embedded Market
- Exploring the Ongoing Debate: Is RISC-V Rigid or Flexible?
- The Vital Role of Development Boards in Growing The RISC-V Ecosystem - SiFive
- Datacenter Innovation with 870-D - SiFive Blog
- LLM Optimization and Deployment on SiFive RISC-V Intelligence Products
- Samsung Highlights Work to Bring RISC-V to Tizen
- AI Workload Acceleration with SiFive’s New Intelligence XM Series
- RISC-V World Tour; Munich, Hangzhou, Santa Clara and Russia??
- RISC-V for the Datacenter: Introducing the P870-D - SiFive Blog
- What’s Coming Up Next for SiFive
- SiFive Enhances RISC-V Automotive Safety Leadership with Critical Functional Safety Certification
- SiFive Becomes First IP Supplier to Achieve Automotive ISO/SAE 21434:2021 Product Certification
- SiFive Leaders Recognized by the 2024 Electronics Weekly Women Leaders in Electronics Awards
- SiFive in Washington: Japan partnership and a stronger semiconductor ecosystem
- New Webinar on Creating Agile AI Systems with Open RISC-V Solutions
- SiFive Upgrades Automotive Security for the RISC-V Ecosystem with New ISO/SAE 21434 Certification
2023 11
- Unlock the Possibilities with HiFive Unmatched RISC-V Development Boards - SiFive
- SiFive’s Performance P470 Receives Best in Show Award at the RISC-V Summit
- The Road Ahead - SiFive Blog
- Arm IPO Underscores the Ongoing Compute Supercycle
- ASIL B Ready Certification for SiFive Automotive Solutions
- Expanding the RISC-V Ecosystem, with PX5, IAR and SiFive
- Ansys Joint Webinar: SiFive Maximizes Compute Density With Its RISC-V Processor Cores
- SiFive Expands U.S. Presence with New Office in Boston
- Unleashing the Potential of RISC-V: A Recap of the SiFive Tech Forum
- Meet us at embedded world
- SiFive Makes a Splash at the RISC-V Summit with 10+ Talks, Demos, and a Surprise Product Reveal
2022 15
- SiFive Expands Presence in India to Keep Up with the Company’s Ultra-fast Growth
- SiFive’s Shubu Mukherjee Recognized Along with Fellow Authors with SIGGMICRO’s Test of Time Award
- SiFive Intelligence X280 as AI Compute Host: Google Datacenter Case Study
- Introducing SiFive Automotive Products
- SiFive's RISC-V Leadership Strengthens with New Vector Solutions
- Introducing the Latest SiFive® Intelligence™ X280 Processor Innovation - the Vector Coprocessor Interface Extension (VCIX)
- SiFive Ranks in Top 10 Percent of Inc.’s Fastest Growing Private Companies in America List
- SiFive arrives on the pitch in Cambridge
- Introduction To SiFive Vector Processors
- 10 Important Things To Know About SiFive Vectors
- Introduction To The SiFive Intelligence X280
- SiFive - The Market Leader In RISC-V Vectors
- The Investment Heard Around The World
- RISC-V is Ready for Great Challenges - SiFive Blog
- The Rapid Rise of RISC‑V
2021 11
- When You Reach The Summit, Keep Climbing
- Accelerating the Future of RISC-V
- RISC-V is Inevitable
- RISC-V Chiplets, Disaggregated Die, and Tiles
- Delivering on the Promise of Industry-Leading RISC-V Processors - SiFive Blog
- The Heart of SiFive is Performance, Intelligence, & Essential
- What’s new in AI & ML from SiFive
- SiFive RISC-V Proven in 5nm Silicon
- SiFive Vector Processing Solutions To Be Highlighted at Linley Spring Processor Conference 2021
- SiFive Core IP 21G1
- SiFive collaborates with new Intel Foundry Services to enable innovative new RISC-V computing platforms
2020 16
- SiFive Strengthens Foothold in Storage Applications for Data-Centric AI Computing
- The Heart of RISC-V Development is Unmatched
- RISC-V Vector Extension Intrinsic Support
- Randomness is Secure with SiFive Shield HCA
- OpenFive's Customizable Silicon-Focused Solutions
- SiFive Core IP 20G1
- Cloud Accelerated Idea To Silicon - SiFive Blog
- Introducing SiFive Insight
- The RISC-V Revolution is Going Strong in Ahmedabad
- Our SiFive Tech Symposiums in Costa Rica and Mexico Underscore the Global Adoption of the RISC-V ISA in Industry and Academia
- Part 4: High-Performance Interconnect for Accelerators: Enabling Optimized Data Transfers with RISC-V
- Part 1: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V
- Part 3: High-Bandwidth Accelerator Access to Memory: Enabling Optimized Data Transfers with RISC-V
- With SiFive, We Can Change the World
- Part 2: High-Bandwidth Core Access to Accelerators: Enabling Optimized Data Transfers with RISC-V
- Part 1: Fast Access to Accelerators: Enabling Optimized Data Transfer with RISC-V
2019 16
- Our SiFive Tech Symposiums in Pakistan Drew Over 2,500 Attendees!
- Incredibly Scalable High-Performance RISC-V Core IP
- SiFive Shield™: An Open, Scalable Platform Architecture for Security
- Making It Easy To Get It Right
- Supporting A World Leading RISC-V IP Portfolio
- Israel is Evolving as a High-Tech Hub, and RISC-V is Playing a Vital Role
- NVDLA Deep Learning Inference Compiler is Now Open Source
- SiFive Fosters RISC-V Collaboration and Education in India and Bangladesh Via Symposiums, Tutorials and Workshops
- Dhrystone Performance Tuning on the Freedom Platform - SiFive Blog
- Three New Core Series Now Available in SiFive Core Designer
- Freedom in Software and in the Metal
- When Hardware Roadmaps Look Like Software Roadmaps
- The RISC-V Revolution is Sweeping Across the APAC Region and Australia
- Freedom Studio Version 2019.03
- Freedom Everywhere — Back for Everyone!
- The Revolution Evolution Continues - SiFive RISC-V Technology Symposium - Part I
2018 12
- You Will Not Get Fired for Choosing RISC-V
- Getting Started with Zephyr RTOS v1.13.0 On RISC-V - SiFive
- An Open Source Release of the Freedom U540-C000's Bootloader
- Interrupts on the SiFive E2 Series
- Intel Capital Investment Boosts Vision for the Future
- RISC-V QEMU Part 2: The RISC-V QEMU port is upstream
- Dover Microsystems Brings Real-Time Chip Security to SiFive’s DesignShare
- The SiFive Download - The Next Revolution is Here!
- All Aboard, Part 11: RISC-V Hackathon, Presented by SiFive
- Welcome Aboard, Sunil Shenoy!
- All Aboard, Part 10: How to Contribute to the RISC-V Software Ecosystem
- A Look Back: 7th RISC-V Workshop
2017 19
- RISC-V QEMU Part 1: Privileged ISA v1.10, HiFive1 and VirtIO
- All Aboard, Part 9: Paging and the MMU in the RISC-V Linux Kernel
- All Aboard, Part 8: The RISC-V Linux Port is Upstream!
- Analog Bits Clocks into the DesignShare Ecosystem
- All Aboard, Part 7: Entering and Exiting the Linux Kernel on RISC-V
- Welcome - The SiFive Download, Part III
- All Aboard, Part 6: Booting a RISC-V Linux Kernel
- Introducing the U54-MC RISC-V Core IP – The First RISC-V Core with Linux Support
- All Aboard, Part 5: Per-march and per-mabi Library Paths on RISC-V Systems
- The DesignShare Ecosystem Grows with the Addition of UltraSoC’s Embedded Analytics IP
- Welcome - The SiFive Download, Part II
- All Aboard, Part 3: Linker Relaxation in the RISC-V Toolchain
- Our New Partnership with Rambus and the DesignShare Economy
- All Aboard, Part 2: Relocations in ELF Toolchains
- All Aboard, Part 1: The -march, -mabi, and -mtune arguments to RISC-V Compilers
- All Aboard, Part 0: Introduction
- RISC-V GCC is upstreamed!
- Women in Open Source: You DO Belong Here
- Stronger Together – Collaborating with OnChip to Expand the Open-Source Hardware Ecosystem